; =========================================================               
; CSX.INC: This file contains the includes needed for the
; Atari DSP implementation of CSX Synthesis. It should be
; included in each DAS file needed.
; =========================================================
; Copyright, 1995 Atari Corporation.
; Written for Atari by Highlight Software Solutions.
; =========================================================
; =========================================================
; INCLUDE VALUES NEEDED FOR CSX SYNTHESIS
; ---------------------------------------
	CSX_MAGIC	.EQU		947
	CSXMAXBLK	.EQU		256
	LCSXMAXBLK	.EQU		(CSXMAXBLK * 4)
	CSXMINBLK	.EQU		32
	LCSXMINBLK	.EQU		(CSXMINBLK * 4)

	CSXLEN_MASK     .EQU            511
	CSXOUT_HALF	.EQU		1024		; half the byte size of
							; output buffers
	; HEADER OFFSETS
	CSXHDRBASE	.EQU		8		; header base length
	LCSXHDRBASE	.EQU		(CSXHDRBASE * 4)
	CSXHDR_PREM	.EQU		1		; index for pre-emp info
	LCSXHDR_PREM	.EQU		(CSXHDR_PREM * 4)
	CSXHDR_SF	.EQU		2		; index for scalefactor info
	LCSXHDR_SF	.EQU		(CSXHDR_SF * 4)
	CSXHDR_RAND	.EQU		3		; index for random dither
	LCSXHDR_RAND	.EQU		(CSXHDR_RAND * 4)
	CSXHDR_FILTER	.EQU		4		; index for filter info
	LCSXHDR_FILTER	.EQU		(CSXHDR_FILTER * 4)
	CSXMAXHDR	.EQU		10		; maximum header size
	CSXINLEN	.EQU		(2 * 64)	; input write size
	CSXINMASK	.EQU		(CSXINLEN - 1)	; mask for in add.

	C3fff		.EQU		$00003fff	; 16 bit constant
	D3fff		.EQU		$3fffffff	; 32 bit constant
	C7fff		.EQU		$00007fff	; 1/2 constant
	C4000		.EQU		$00004000	; 1/2 constant

; REGISTER MAP USEAGE
; -------------------
; Bank 0 (Main Bank):

; CONTROL PORTIONS OF CODE			COMPRESSION PORTIONS OF CODE
; ========================			============================
; R0:	don't use				don't use
; R1:	Used by ISR, Don't use			Used by ISR, Don't use
; R2:	CX2
; R3:	AOUT_TEMP (ISR) 			AOUT_TEMP (ISR)
; R4:	AOUT_LHEAD (ISR)			AOUT_LHEAD (ISR)
; R5:	AOUT_LTAIL (ISR)			AOUT_LTAIL (ISR)
; R6:	AOUT_RHEAD (ISR) 			AOUT_RHEAD (ISR)
; R7:	AOUT_RTAIL (ISR)			AOUT_RTAIL (ISR)
; R8:	CX3
; R9:	CX4
; R10:	AOUT_RIGHT (ISR)  			AOUT_RIGHT (ISR)
; R11:	AOUT_LEFT (ISR)  			AOUT_LEFT (ISR)
; R12:	Used by ISR, Don't use			Used by ISR, Don't Use
; R13:	CX1
; R14:	CX5
; R15:	CX6
; R16:	CX7					M_VAR1
; R17:	CX8					M_VAR2
; R18:	CX9					M_VAR3
; R19:	LEFTRIGHT				LEFTRIGHT
; R20:	HEAD                                    M_BITS
; R21:	TAIL                                    M_FIL
; R22:	CA1 (Argument 1)			CA1 (Argument 1)
; R23:	CA2 (Argument 2) 			CA2 (Argument 2)
; R24:	RETADD (return address)			RETADD (return address)
; R25:	Free after startup                      M_LOOPCNT
; R26:	ENDOFINPUT				M_INADD
; R27:	PACKETLEN				M_ADD
; R28:	Used by ISR, Don't use			Used by ISR, Don't use
; R29:  Used by ISR, Don't use                  Used by ISR, Don't use
; R30:	Used by ISR, Don't use			Used by ISR, Don't use
; R31:	PC					PC


; AUDIO OUT ISR REGISTERS
; -----------------------
; Registers that should be left for single use of the audio
; out functions in the ISR. They should be initialized, and
; left alone by all main thread software.
	AOUT_LEFT       .EQUR           r11     ; Audio Left DAC Address
	AOUT_RIGHT      .EQUR           r10     ; Audio Right DAC Address                 
	AOUT_TEMP       .EQUR           r3      ; Audio Output Temp Register
	AOUT_LTAIL       .EQUR           r5     ; Left Audio Tail Pointer
						; (Moved by the ISR Only)
	AOUT_LHEAD       .EQUR           r4     ; Left Audio Head Pointer
						; (Moved by CSX Synth only)
	AOUT_RTAIL       .EQUR           r7     ; Right Audio Tail Pointer
						; (Moved by the ISR Only)
	AOUT_RHEAD       .EQUR           r6     ; Right Audio Head Pointer
						; (Moved by CSX Synth only)


; Registers used by the Main DSP Thread: CONTROL CODE
; ----------------------------------------------------
; These registers are the names and other names of commonly used
; registers by the main thread.

; Globally Used, Non temporary Registers
; --------------------------------------
	LEFTRIGHT 	.EQUR		r19	; Left is one, Right is zero.
	ENDOFINPUT	.EQUR		r26	; End of input buffer
	PACKETLEN	.EQUR  		r27	; CSX Packet length


; Scratch Registers
	CX1             .EQUR           r13      ; Scratch register 1
	CX2             .EQUR           r2      ; Scratch register 2
	CX3             .EQUR           r8      ; Scratch register 3
	CX4             .EQUR           r9      ; Scratch register 4
	CX5             .EQUR           r14     ; Scratch register 5
	CX6             .EQUR           r15     ; Scratch register 6
	CX7             .EQUR           r16     ; Scratch register 7
	CX8             .EQUR           r17     ; Scratch register 8
	CX9		.EQUR		r18	; Scratch register 9
	JUMPREG		.EQU		CX9	; Jump Register
	HEAD            .EQUR           r20     ; Head Pointer address
	TAIL            .EQUR           r21     ; Tail Pointer address



; CSX Argument Registers
	CA1	.EQUR		r22
	CA2	.EQUR		r23
	RETADD	.EQUR		r24		; Used for return Label


; Registers used by the Main DSP Thread: COMPRESSION CODE
; -------------------------------------------------------
M_LOOPCNT	.EQUR		r25		; used for loopcounting
M_ADD		.EQU		PACKETLEN	; address of state in hdr
M_BITS		.EQU		HEAD		; bits per miniblock
M_FIL		.EQU		TAIL		; filter per miniblock
M_INADD		.EQU		ENDOFINPUT	; input address storage

; the following three registers replace CX7 thru CX9, don't use them
; in control, unpacking or filter functions in bank 0
M_VAR1		.EQU		CX7		; 1st of up to 3 state vars
M_VAR2		.EQU		CX8		; 2nd
M_VAR3		.EQU		CX9		; 3rd

; The following registers are used on the alternate bank for storing
; values so that more registers can be used by large functions.
X_ERRSAV		.EQUR		r12
X_MULSAV		.EQUR		r13
X_MAGIC			.EQUR		r14
X_RAND	     		.EQUR		r15
X_STORE1		.EQUR		r16
X_STORE2		.EQUR		r17
X_STORE3		.EQUR		r18
X_STORE4		.EQUR		r19
X_STORE5		.EQUR		r20
X_STORE6		.EQUR		r21
X_STOREADD		.EQUR		r22
X_EMPH			.EQUR		r23
X_CSXEXP 		.EQUR		r24
X_CSXFRAC		.EQUR		r25

X_STORE7		.EQUR		r28
X_STORE8		.EQUR		r29

