| FreePCB User Guide | Version 1.2

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5. PCB Layout (continued)

5.18 Design Rule Checking

In an ideal world, PCBs would always be fabricated exactly as specified in the Gerber and drill files. In real life, of course, this isn't true. Due to the inexact nature of the etching process, copper features may turn out slightly larger or smaller than specified. Layers on multilayer boards may not line up exactly, and the size and position of holes may vary due to manufacturing tolerances. In practical terms, this means that there are lower limits on trace widths, pad sizes, and clearances between copper features and/or holes. These limits are called Design Rules, and will vary depending on the manufacturing process.

The PCB manufacturer should provide design rules for each process that it offers. For example, the design rules posted on the Internet for the Advanced Circuits low-cost process are shown below:

Minimum trace width | 0.008 inch
Minimum clearance between copper features | 0.008 inch
Minimum distance from copper to edge of PCB | 0.014 inch
Minimum annular ring width (pins) | 0.007 inch
Minimum annular ring width (vias) | 0.005 inch
Minimum silkscreen line width | 0.008 inch

The design rules for the PCB Express low-cost process are:

Minimum trace width | 0.007 inch
Minimum clearance between copper features | 0.007 inch
Minimum distance from copper to edge of PCB | 0.020 inch
Minimum space between pads (using solder mask clearance of 0.004 inch) | 0.013 inch
Minimum annular ring width (pads and vias) | 0.0085 inch
Minimum clearance from inner layer holes to copper | 0.0175 inch
Minimum silkscreen line width | 0.007 inch

If you are making the board yourself, you will have to come up with your own design rules.

FreePCB has a Design Rule Checker that checks your project for compliance with a set of design rules. Selecting Tools > Design Rule Check pops up the following dialog:

The Show unrouted connections as errors checkbox allows you to treat connection errors as DRC errors. The other fields in the dialog are explained below:

trace width | The minimum trace width allowed
pad to pad | The minimum distance from the edge of one pad to another on a different net
pad to trace | The minimum distance from the edge of a pad to a trace on a different net
trace to trace | The minimum distance from the edge of a trace to a trace on a different net
hole to pad or trace | The minimum distance from the edge of a hole to a pad or trace on a different net
hole to hole | The minimum distance from the edge of a hole to the edge of another hole
annular ring (pins) | The minimum width of copper surrounding a hole for a pin
annular ring (vias) | The minimum width of copper surrounding a hole for a via
board edge to any copper | The minimum clearance between any copper feature and the edge of the board
board edge to hole | The minimum clearance between the edge of a hole and the edge of the board
copper area to copper area | The minimum clearance between copper areas

You should set these fields for the design rules that you are using. If the PCB manufacturer doesn't give the value for a particular field, you will have to guess at a reasonable value. For example, the settings that I would use for Advanced Circuits are shown below:

The settings for trace width, pad to pad, pad to trace, trace to trace, annular ring (pins), annular ring (vias), board edge to any copper, hole to pad or trace and copper area to copper area were taken from the design rules posted on the Internet. Since there were no rules provided for hole to pad or trace, hole to hole or board edge to hole, I used 25 mils which seems like a reasonable value. If necessary, I could confirm this with the PCB manufacturer.

As an example, let's check the project shown below, which contains multiple intentional design rule violations.

To check the design, select Tools > Design Rule Check and set the design rules as described above. Clicking Check starts the checker and brings up the following dialog that lists all of the violations.

When you close the Design Rule Check dialog, each violation will be indicated in the layout window by a small ring in the color for DRC errors, as shown below.

These small rings may be hard to see in a dense design. If you hold down the "d" key, each ring is converted to a much larger solid circle, as shown.

Now you can zoom in on individual errors and fix them. The group of errors near the bottom of the board is shown below.

You can select one of the errors by clicking on the ring. It will be highlighted, along with the elements that caused the error, and the status bar will show a description of the error. In the screenshot below, I clicked on the right-most error.

In this case, the error is a pad-to-trace distance violation, where the distance is 0 mils instead of at least 8 mils. We can fix the error by moving the pad or trace. The error ring will not automatically disappear when you fix the error, but you can delete it by selecting it and pressing the "delete" key. You can delete all of the errors by selecting Tools > Clear DRC Errors.

Important note: Compliance with some design rules also depends on your Gerber file settings. For example, the settings shown below could create violations of the minimum silkscreen line width (which should be at least 7 mils for Advanced Circuits) and the annular ring width for pins (which should be at least 7 mils), so they should be changed to match the design rules.

Another note: If you found this section confusing, some PCB manufacturers provide information about design rules on their websites.

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